Auto Pan — HLE reconstruction and DSP bytecode

DSPHLE selector 0x13 · program image prog48_auto_pan · Preview (topology decoded and reconstructed; most panel→cell role mappings are position-decoded).

quadrature LFO pans L/R; rate=cell 0x01 MEASURED (~1.2 Hz).

This page pairs the bytecode the effect runs on the NEC µPD6383GF with the high-level reconstruction that makes it audible in MAME. The reconstruction is not the chip’s microcode — it is a textbook DSP block built from the decoded meaning of that microcode, and reading the two together is how the bytecode is understood (and, in time, driven toward a faithful low-level emulation). See also the signal-flow flowchart.

The bytecode below is the source of truth; the HLE reconstruction is not. The HLE is our best current interpretation and may contain mistakes — where the two disagree, the bytecode wins, and a better HLE should be updated here. This page is the permanent archive of the reference HLE: it is kept here even after the code is eventually removed from the MAME sources.

DSP bytecode (reverse-engineered microprogram)

The disassembled image the chip executes for this effect. Source (regenerable): dsp/disasm/prog48_auto_pan.dsm.

; Reverse-engineered disassembly of the KN5000 effects-DSP microcode
; (NEC uPD6383GF), recovered from the original firmware.  The microcode is the
; work of its original authors; this is a disassembly for preservation and
; interoperability, and no claim of copyright is made over the disassembled program.
; KN5000 effects-DSP program -- AUTO PAN
; image rep algo 48  |  slots 48  |  unit 0 (I-RAM load 84)
; family am  |  confidence high  |  50 words, 8 class-A multiplies (2 named)
; role: auto pan: quadrature LFO amplitude panner
; coefficient cursor base 0x00
;
; GENERATED by dsp/tools/gen_dsp_disasm.py -- DO NOT EDIT.
; Put labels/comments in the matching dsp/sym/*.sym; analysis in dsp/algorithms/.

  w0    08801308BC   ?word   0x08801308BC   ; 880.1.30.8BC  hi12{ESC ?7 res=080}  [external delay-DRAM READ (FORCED, adjudication-round5 sect. 3 -- addr8 bit 6 is the direction field and 0x60 is the WRITE; this REVERSES R1 F1, which bounded the read latency to one repetition when the descriptors need twenty words); this end moves with the user's DELAY (ms) knob, and the delay is READ_CELL - WRITE_CELL; addr8 0x30 also marks the FIRST DRAM access of a body, 37 of 38 distinct images (R3 sect. 6.2). external delay-DRAM access; address = DESCRIPTOR_CELL[k] + G, from the host bank behind pointer ...825 / tag 0x4C (R3, PROVEN BY CONSTRUCTION) -- the k-th class-1 escape word of a body takes the k-th cell of that body's own descriptor block (the IDENTITY map, FORCED in adjudication-round5 sect. 1), so the address is NOT in this word]
  w1    000020B1CD   ld      (p),(p)+11
  w2    000020040E   ld      acc,(p)+0
  w3    0212200000   mac.b   (p)0,(p)+0 ; mem[p]<-acc, acc=0
  w4    002A200000   ?word   0x002A200000   ; 02A.2.00.000  hi12{f31=5 ?5 res=020}  [SPECULATIVE (prospective, not measured): SRC 0x00 = mem[ptr]/delay-RAM read]
  w5    0880130000   dly.r  dsc[k],p+48
  w6    0000200000   nop
  w7    0000200000   nop
  w8    0000200000   nop
  w9    00262001D5   ?word   0x00262001D5   ; 026.2.00.1D5  hi12{f31=3 ?5 res=020}  [SPECULATIVE: class-2 post-increment MAC (source 0x07); the accumulator-combine f31=3 and/or ACT 0x15 are OPEN]
  w10   0192A0040E   mac     acc,c+,(p)+0 ; store SUPPRESSED (bit7)
        ; C-RAM[0x00] (coeff, base 0x00 MEASURED)
        ; coeff C-RAM[0x00] = op0x66[0] (role mix/tap, INFERRED)
  w11   02042FE44D   ?word   0x02042FE44D   ; 204.2.FE.44D  hi12{f98=2 f31=2}  [SPECULATIVE (prospective, not measured): SRC 0x11 = ACCB (2nd accumulator); ACT 0x0D = delay/state MIXING: mem onto bus (universal; pair w/ 0x0E)]
  w12   0202200000   mac.b   (p)0,(p)+0
  w13   0028200000   ?word   0x0028200000   ; 028.2.00.000  hi12{f31=4 ?5 res=020}  [SPECULATIVE (prospective, not measured): SRC 0x00 = mem[ptr]/delay-RAM read]
  w14   0024200000   post.b  (p)0,(p)+0
  w15   0000204407   ld.st   acc,(p)+4
  w16   0092A00200   mac.b   c,c+,(p)+0 ; store SUPPRESSED (bit7)
        ; C-RAM[0x01] (coeff, base 0x00 MEASURED)
  w17   00822001C0   mac.b   (p),(p)+0
  w18   0094A00200   wrap    acc,c+          ; acc <- datum(acc) & coef  (LFO modulus)
        ; C-RAM[0x02] (coeff, base 0x00 MEASURED)
  w19   0000200447   ?word   0x0000200447   ; 000.2.00.447  hi12{-}  [SPECULATIVE (prospective, not measured): SRC 0x11 = ACCB (2nd accumulator)]
  w20   0092200700   ?word   0x0092200700   ; 092.2.00.700  hi12{ST f31=1 ?7 res=080}  [SPECULATIVE (prospective, not measured): SRC 0x1C = control/mod source into MAC (100% MAC-consumed; LFO in mod fx, envelope/AGC in dynamics) -- NOT LFO-only: present in 19 non-LFO programs (dsp_datapath_fingerprint)]
  w21   0000A001D5   ld      (p),c+,(p)+0
        ; C-RAM[0x03] (coeff, base 0x00 MEASURED)
  w22   0182200000   mac.b   (p)0,(p)+0
  w23   0040000C63   ?word   0x0040000C63   ; 040.0.00.C63  hi12{?6 res=040}  [SPECULATIVE (prospective, not measured): SRC 0x11 = ACCB (2nd accumulator)]
  w24   00006184CD   ?word   0x00006184CD   ; 000.6.18.4CD  hi12{-}  [table-lookup idiom, class-6 addr8 = table selector (INFERRED)]
  w25   00124011CE   ?word   0x00124011CE   ; 012.4.01.1CE  hi12{ST f31=1}  [table-lookup idiom, third word (INFERRED)]
  w26   01042FE1CE   post    (p),(p)-2
  w27   0102200000   mac.b   (p)0,(p)+0
  w28   0000203407   ld.st   acc,(p)+3
  w29   0092A00200   mac.b   c,c+,(p)+0 ; store SUPPRESSED (bit7)
        ; C-RAM[0x04] (coeff, base 0x00 MEASURED)
  w30   00822001C0   mac.b   (p),(p)+0
  w31   0094A00200   wrap    acc,c+          ; acc <- datum(acc) & coef  (LFO modulus)
        ; C-RAM[0x05] (coeff, base 0x00 MEASURED)
  w32   0000200447   ?word   0x0000200447   ; 000.2.00.447  hi12{-}  [SPECULATIVE (prospective, not measured): SRC 0x11 = ACCB (2nd accumulator)]
  w33   0092200700   ?word   0x0092200700   ; 092.2.00.700  hi12{ST f31=1 ?7 res=080}  [SPECULATIVE (prospective, not measured): SRC 0x1C = control/mod source into MAC (100% MAC-consumed; LFO in mod fx, envelope/AGC in dynamics) -- NOT LFO-only: present in 19 non-LFO programs (dsp_datapath_fingerprint)]
  w34   0000A001D5   ld      (p),c+,(p)+0
        ; C-RAM[0x06] (coeff, base 0x00 MEASURED)
  w35   0182200000   mac.b   (p)0,(p)+0
  w36   0040000C63   ?word   0x0040000C63   ; 040.0.00.C63  hi12{?6 res=040}  [SPECULATIVE (prospective, not measured): SRC 0x11 = ACCB (2nd accumulator)]
  w37   00006184CD   ?word   0x00006184CD   ; 000.6.18.4CD  hi12{-}  [table-lookup idiom, class-6 addr8 = table selector (INFERRED)]
  w38   00124011CE   ?word   0x00124011CE   ; 012.4.01.1CE  hi12{ST f31=1}  [table-lookup idiom, third word (INFERRED)]
  w39   01042F21CE   post    (p),(p)-14
  w40   010220A1CD   mac     (p),(p)+10
  w41   00002021CE   ld      (p),(p)+2
  w42   0212200407   mac.st  acc,(p)+0 ; mem[p]<-acc, acc=0
  w43   002A200000   ?word   0x002A200000   ; 02A.2.00.000  hi12{f31=5 ?5 res=020}  [SPECULATIVE (prospective, not measured): SRC 0x00 = mem[ptr]/delay-RAM read]
  w44   00262001D5   ?word   0x00262001D5   ; 026.2.00.1D5  hi12{f31=3 ?5 res=020}  [SPECULATIVE: class-2 post-increment MAC (source 0x07); the accumulator-combine f31=3 and/or ACT 0x15 are OPEN]
  w45   0192A0040E   mac     acc,c+,(p)+0 ; store SUPPRESSED (bit7)
        ; C-RAM[0x07] (coeff, base 0x00 MEASURED)
        ; coeff C-RAM[0x07] = op0x66[1] (role mix/tap, INFERRED)
  w46   02042EF44D   ?word   0x02042EF44D   ; 204.2.EF.44D  hi12{f98=2 f31=2}  [SPECULATIVE (prospective, not measured): SRC 0x11 = ACCB (2nd accumulator); ACT 0x0D = delay/state MIXING: mem onto bus (universal; pair w/ 0x0E)]
  w47   0202200000   mac.b   (p)0,(p)+0
  w48   0028200000   ?word   0x0028200000   ; 028.2.00.000  hi12{f31=4 ?5 res=020}  [SPECULATIVE (prospective, not measured): SRC 0x00 = mem[ptr]/delay-RAM read]
  w49   042410E000   endblk  #0E             ; END OF BLOCK -- the last word of a block

HLE reconstruction (MAME, kn5000_tonegen.cpp)

The decode of the bytecode above, rebuilt as audible DSP. Two parts: the parameter refresh (reads the decoded C-RAM coefficient cells once per update) and the per-sample insert (the signal processing). Default OFF, behind the DSPHLE research port. Source: src/mame/matsushita/kn5000_tonegen.cpp.

Parameter refresh (decode the C-RAM coefficients):

	const bool pan_hle = (dsphle == 0x13);
	double pan_inc = 0.0, pan_depth = 0.0;
	if (pan_hle)
	{
		pan_inc   = std::clamp(rate_hz(0x01), 0.05, 12.0) / double(STREAM_RATE);
		pan_depth = std::clamp(0.4 + 0.6 * std::fabs(q22x(m_dsp1->cram_read(0x00)) * x_cs), 0.4, 1.0);
	}

Per-sample insert (the reconstructed signal path):

		if (pan_hle)   // AUTO PAN: quadrature LFO pans L/R in antiphase
		{
			const double xl = double(mix_l) / 32768.0, xr = double(mix_r) / 32768.0;
			const double s = std::sin(TWO_PI * m_pan_phase);
			m_pan_phase += pan_inc; if (m_pan_phase >= 1.0) m_pan_phase -= 1.0;
			const double gl = 1.0 - pan_depth * 0.5 * (1.0 - s), gr = 1.0 - pan_depth * 0.5 * (1.0 + s);
			mix_l = int32_t(std::clamp(xl * gl, -1.0, 1.0) * 32767.0);
			mix_r = int32_t(std::clamp(xr * gr, -1.0, 1.0) * 32767.0);
		}